September 9, 1998

Overview

Version 1.6.4 of the V6M6 host software and FPGA configurations includes the following changes:

• Additional support for DM4C51 TDM connection control in the host application library.
• Modified DM2C31 and DM4C51 Mailbox Test in the pcichip diagnostic program.
• Hardware and software modifications for PM4600, PM4700, PM4700a and PM5000 MIPS modules.

Note: This release includes some new flash files for FPGA configurations. Please be sure to run pciflashup after installing the software.

Additional Support for DM4C51 TDM Connection Control

Modifications and new functions are added to the host application library for DM4C51 TDM connections. The primary goal of these changes is to provide better control over the relationship between TDM time slots and the DSP local time slots.

The previously existing functions, dm4c51_tdm_src_add, dm4c51_tdm_dst_add, dm4c51_tdm_src_del, and dm4c51_tdm_dst_del, were modified to help keep track of the local slot allocation, They now return the local slot number allocated or de-allocated. The slots are numbered from 1 to 32. A return value of 0 indicates an error.

A new group of functions was added to provide control of the TDM connections from the DSP's perspective. These functions allow TDM connections to specify the local time slots to be allocated and de-allocated.

The dm4c51_tdm_src_add_lcl and dm4c51_tdm_dst_add_lcl functions specify the local time slot number (1 to 32) to be allocated for the source or destination connection to the specified TDM time slot and bus. They return 1 when successful or <0> in case of an I/O error, invalid argument, or if the specified local time slot is already in use.

    int
    dm4c51_tdm_src_add_lcl (pci, slot, bus, local)

    int
    dm4c51_tdm_dst_add_lcl (pci, slot, bus, local)

        PCI_MOD *pci    - pointer to an open DM4C51 DSP
        u_int    slot   - TDM time slot (1 - 128)
        u_int    bus    - TDM bus (0 - 7)
        u_int    local  - local DSP time slot (1 - 32)

The dm4c51_tdm_src_del_lcl and dm4c51_tdm_dst_del_lcl functions specify the local time slot number (1 to 32) to be de-allocated as a source or destination connection. They disconnect whatever TDM time slot and bus is connected for the specified local time slot. They return 1 when successful or <0> in case of an I/O error, invalid argument, or if the specified local time slot is not currently in use.

    int
    dm4c51_tdm_src_del_lcl (pci, local)

    int
    dm4c51_tdm_dst_del_lcl (pci, local)

        PCI_MOD *pci    - pointer to an open DM4C51 DSP
        u_int    local  - local DSP time slot (1 - 32)

Modification to Mailbox Interrupt Test

The mailbox interrupt test done in the pcichip diagnostic program for DM2C31 and DM4C51 modules was separated from the general host and processor interrupts test.

Hardware and Software Modifications for MIPS Modules

The FPGA configurations and software initialization or the the following MIPS processor modules have been updated:

PM4600 and PM4700

Both of these modules use the same configuration data in the flash file, pm460026.mcs. This version fixes bugs related to single PCI bus idle cycles when fast PCI bus masters are accessing on of these modules.

PM4700A and PM5000

The configuration data for these modules are in the flash files, pm4700a8.mcs and pm50008.mcs, respectively. The new versions are fixed to generate proper byte enables when the MIPS processor reads from the PCI bus. They also contain updated processor boot configuration streams to meet the latest recommendations form IDT.

The pciflashup program must be run to update the configuration data stored in the flash memory of V6M6 base boards. The flash will not be modified on boards that do not have any of these module types installed.

The host library functions for initializing PM4700A and PM5000 modules, pm4600_init and pm5000_init, were modified to initialize the processor configuration dependent on the processor's clock frequency.

The 4600meminit and 5000meminit MIPS programs exectuted by the pciinit program were modified to improve their cache-clearing mechanism. Similar changes were included in the startup code distributed in the file, $CAC/pci/modsupport/mipsgcc/src/crt0_orn.S.

The portion of the pcichip diagnostic program that tests the MIPS timer interrupts was modified to make the timer interval on PM4700A and PM5000 modules dependent on the processor's clock frequency.