September 16, 1997

Version 1.4.5 of the V6M6 host software and FPGA configurations includes the following changes:

• New low-power (sleep) mode for the V6M6 controlled by the pciinit program.
• Added support for Host-driven DMA data transfers to PCI memory space.
• Fixed bug in TDM Configurator support on IMG726 modules.
• Modified MIPS to PCI address translation.
• Added recognition of MIPS ISA3 coff files.

Note: This release includes new flash files for FPGA configuration and the V6M6 micro-controller program. Please be sure to run pciflashup after installing the software.

New Low-Power (Sleep) Mode

The new version of V6M6 micro-controller program code (progtdm20.mcs) provides for a low-power, sleep mode. In this mode, power consumption is set to a minimum by:
• deconfiguring FPGAs on all mini-PCI modules and the baseboard memory controller FPGAs.
• setting the PCI and DSP module (DM2C31 and DM4C51) clock generators to low frequencies.

Setting and recovering from low-power mode is performed using the pciinit program. The new -L option causes all the V6M6 boards specified to be put into low-power mode. For example:

    pciinit -L pci0
    pciinit -L all

The first example will set the board referenced as pci0 to low-power mode. The second will set all V6M6 boards in the system to low-power mode.

To bring the boards back to normal operating mode use pciinit with the -R (hard reset) option.

Host-driven DMA Transfers

Many VMEbus CPU boards contain a DMA controller which may be used to transfer data between the CPU's on board memory and other VME cards. A modification to the V6M6 VME interface and additions to the Software Support Library provide support for this capability for the V6M6. Data transfers with the V6M6 using the host's DMA controller can increase the transfer rate by 20% to 30%. However, the primary advantage in using the host's DMA controller is that it reduces the load on the CPU, itself, by 80% or more when compared with using the CPU to transfer data using memory mapped access.

V6M6 requirements for this capability are:

• A version 2 V6M6 board with VME interface FPGA configuration flash object version, vmepcib108.mcs.
• Version 1.22 of the Software Support Library (included with V6M6 Software Release 1.4.5).

Current host system requirements:

• Operating system: Solaris 2.5 or above.
• Processor board: Force Computers CPU-5V, CPU-5VT, CPU-7V, CPU-8VT, CPU-20VT and CPU-24VT (with Force Computer's VME device driver version 2.0.4 or above).

Support for this capability will eventually be provided for processor boards. Please note that because the access to the DMA controller is hardware and operating system dependent, binary files compiled on one system type may not be copied to a system of another type.

Data transfers are performed on arrays of 32-bit words. The array should be allocated aligned on a page boundary (4096). The actual required alignment may vary from system but a value of 4096 should be safe for any system. Memory can be allocated on a specific alignment using the memalign. system function. For example:

    u_long *data = (u_long *) memalign(4096, num_bytes) ;

The transfers are done by accessing a special address range within the V6M6's address VME address space. The bridge to the PCI address space is handled by the V6M6's H host resource. Programs using host-driven DMA must obtain access to the H resource and prepare its registers. This initialization is performed by the pci_hostdma_setup function, described below. The V6M6 hardware can handle individual transfers of up to 8K words (32,768 bytes), within its special VME address range. The library functions break up larger arrays into blocks of 8,192 words passing each block to the CPU's DMA controller.

Performing host-driven DMA transfers is done using functions in the V6M6 Software Support Library. The functions' arguments have changed in version 1.6.0 of the V6M6 software. They are described in the release notes for that version.

TDM Configurator Bug Fixed

In the previous release, the TDM Configurator was loading the encoder registers of the BT8110 chips on IMG726 mini-PCI modules with the values specified for the decoder. This has been fixed in the current version.

MIPS to PCI Address Translation Modified

The translation of MIPS virtual addresses to PCI memory addresses for the PM4600 and PM4700 modules has been modified to accommodate a single global memory segment. Addresses in the range of 0x80000000 to 0x0xBFFFFFFF are assumed to be in local (on-module memory). All others are assumed to be in global memory.

MIPS ISA3 Coff Files

The COFF file parsing that downloads code files has been updated to recognize coff files that include the MIPS ISA3 instruction set.