May 15, 2000
Overview
Version 2.0.1 of the V6M6 software and FPGA and CPLD configurations includes the following changes:
Updates for V6M6HS Embedded Code and Hardware Configurations
The VME bridge FPGA configuration (vmebrg17.mcs) now includes
support for VME Master mode.
The P2 PCI bridge (P2CI) FPGA configuration now supports local PCI
to P2CI and P2CI to SDRAM transfers.
The SDRAM logic in this device is improved to operate at 2 times the PCI
clock frequency.
Bug Fix in VME Interface Logic for V6M6 Boards
Timing Improvements for DM4C51 DSP Module
New Configuration File Format for IMHC4 Module
Support Files for RC32364 on V6M6HS Boards
The files are located in $CAC/pci/modsupport/p364.
Software Fix for IM2E1 and IM2T1 TDM Clock Generation
The host library functions, im2e1_rcvclk, im2t1_rcvclk and
pci_tdm_timing in this version are fixed to perform this operation
correctly.
Note: this is the same fix that is included in version 1.8.4a of the
V6M6 software.
Host Device Driver Modifications
The SunOS (4.1.x) device driver is fixed to properly return an EINVAL
error when an unknown ioctl command is specified.
Software Modification for DM2C31 DSP Modules
Software Modifications for V6M6HS Operations
This release includes new versions of the V6M6HS boot loader code
and RTEMS operating system.
These are distributed in the $CAC/pci/flash directory in the files,
v6m6hsb511.s3, v6m6hss511.s3 and hsrtems002.bin.
A bug in the logic for handling VME Bus Grant on V6M6 boards
allowed two boards to become VME bus master at the same time
(depending on the timing of events).
This has been fixed in vmepci116.mcs for Rev-3 boards, vmepcib116.mcs
for Rev-2 boards and vmepcia44.mcs for Rev-1 boards.
The PCI interface logic for the DM4C51 DSP module (dm4c5130.mcs)
is modified to allow PCI bus clock rates up to 25 MHz.
The configuration data file for IMHC4 codec module (imhc48.mcs)
is now in a format compatible with the V6M6HS base board.
The software distribution now includes source code and other support files for
the software that runs on the IDT RC32364 MIPS Processor
integrated on V6M6HS boards.
The host library functions that control the TDM clock generation mode
for IM2E1 and IM2T1 modules had a bug that caused them to not properly
set the TDM clock generation mode.
The mode in which those modules generate TDM clock at 3.8 PPM faster
than the faster of their two incoming derived clocks was not being set.
A new ioctl request is added to the V6M6/HS device drivers
for SunOS, Solaris and VxWorks that allows the Address Modifier used
for VME Bus Master mode to be changed. The request macro is PCI_VMEADRMOD.
The dm2c31_clock function is fixed to properly compute the DSP clock
frequency on V6M6HS boards.
Several host library functions for control operations on V6M6HS boards
are modified to support new features and for consistency.