The V6M6HS base board is the next generation of Mini-PCI carrier boards for VMEbus. The new features of the this board include:

• Hot Swappable
• Integrated IDT RC32364 MIPS Processor
• Large Flash Memory for a Self-Booting System
• Increased PCI Clock Frequency (from 20 MHz to 33 MHz)
• PCI Bridging Via VME P2 Connector
• Compatible With Most Existing CAC Mini-PCI Modules

• handling interrupts from the base board MIPS processor
• providing module info for the base board MIPS processor via the PCI_MODINFO and PCI_MODTYPE ioctl requests.
• new ioctl requests, PCI_SETPERIPH and PCI_GETPERIPH, for setting and retrieving the PCI address for additional V6M6HS resources.

A new ioctl, PCI_VMEIRQBRQ, to determine the VME interrupt vector, interrupt level and bus request number for V6M6 or V6M6HS boards.

The PCI_RESET ioctl now re-determines the board type (V6M6 or V6M6HS). This feature is primarily used for diagnostic purposes when a board may be swapped out for one of a different type.

The device driver now uses only minor device numbers for existing PIO modules. This does not affect Solaris or VxWorks installations but does allow more boards to be installed for a SunOS (4.1.x) system. See important note 3, below.

For Solaris 7, modifications were made to handle the different data type declared for the data pointer argument of the ioctl entry point.

Notes:

1. The device drivers do not yet support live insertion or extraction of V6M6HS boards from a running system. Boards may be removed and replaced but this must be done while no application is accessing the board being replaced. Boards will not be recognized if installed subsequently to the system being booted or the device driver being loaded.

2. The Solaris 7 driver is not yet supported under the 64-bit Kernel. Solaris 7 systems must be booted using the 32-bit Kernel, from the file kernel/unix.

3. Due to the change in the number of minor device numbers used for V6M6 and V6M6HS boards, devices entries for these boards in existing installations will not be valid.

   On SunOS (4.1.x) the pci device nodes in /dev must be rebuilt using the makepcidev script in $CAC/pci/pcisundev.

   On Solaris (2.x) the device entries in /etc/path_to_inst need to be regenerated. This can be accomplished by rebooting the system. From a running system use the command reboot -- -r or, from the OpenBoot prompt (ok>), boot -r. For Solaris 7 (2.7) or higher with 64-bit kernel capability, it will be necessary to halt the system and boot the 32-bit Kernel from the OpenBoot prompt with the command, boot kernel/unix -r.

For those users who have included such operations in their applications, the following information provides information necessary for porting to the new library functions.

The auxiliary library file, $CAC/lib/libpciop.a, is no longer included or supported.

The following functions have been replaced. The old functions required the application to set global variables, fdata_adr and fstat_adr, to specific offsets within the memory mapped space of the TDM resource of a V6M6 board. The new functions require, instead, a PCI_TDM pointer to be passed as an argument.

Old Functions	New Functions
eerom_read eerom_write eerom_erase flash_read flash_read_byte no previous equivalent flash_write flash_write_byte no previous equivalent flash_erase flash_erase flash_erase_nostat	tdm_eerom_read tdm_eerom_write tdm_eerom_erase tdm_flash_read_seg tdm_flash_read_byte tdm_flash_read_word tdm_flash_write_seg tdm_flash_write_byte tdm_flash_write_word tdm_flash_erase_seg tdm_flash_erase_all tdm_flash_erase_seg_nostat

The PCI addressing mode for the DM5420 has been modified. The previous version used three address to encode the initiator of a read access to the DM5420. These bits were compared on subsequent accesses to ensure that prefetched data was delivered to the proper initiator.

The new version stores and compares the target address for reads of prefected data. Although it is possible for prefetched data to be retrieved by a different initiator than the one initially requesting the data, the data is guaranteed to come from the proper target address.

This method reduces the PCI address space requirement of the DM5420 from 256MB to 32 MB.

The pciinit program is modified to adjust the PCI address space allocated for DM5420 modules to the new requirements.

DM12C549:
The FPGA configuration file for DM12C549 modules (dm12c54019.mcs) is modified to operate at 33 MHz PCI clock. Other changes included fix some possible PCI protocol violations.

base name	type	purpose
vmebrg chronhs p2ci v6m6hs v6m6hsb v6m6hss hsrtems	.mcs .mcs .mcs .xsvf .s3 .bin .bin	VME Bridge FPGA Configuration IDT RC32364 Bridge FPGA Configuration P2 PCI Bridge & Global Mem Cntrl FPGA Configuration Misc Glue Logic & State Machines CPLD Configuration V6M6HS boot code run out of flash V6M6HS boot code copied into DRAM RTEMS Operating system for IDT RC32364