September 25, 1998

Overview

Version 1.6.5 of the V6M6 host software and FPGA configurations includes the following changes:

• Added support for IMATM modules to generate TDM Clock for the V6M6.

• Fixed the TDM map functions for DM4C51 modules to allow for connections to the TDM valid lines.

• New FPGA configuration for PM4700a MIPS modules.

Note: This release includes a new flash file for FPGA configurations. If your system includes PM4700A MIPS modules, be sure to run pciflashup after installing the software.

Generating TDM Clock from IMATM Modules

The pci_tdm_timing function is modified to support using an IMATM module as the source for TDM clock. The function will also diable an IMATM module from generating TDM clock if some other TDM clock is specified.

The imatm_init function is modified to disable IMATM modules from generating TDM clock. This function is (and has been) called by the pciinit program to initialize IMATM modules to a state in which they are not generating TDM clock.

Fixed TDM Mapping Functions for DM4C51

The TDM control functions for the DM4C51 module are modified to allow the TDMbus argument to be in the range of 0 through 7. Values from 0 through 3 specify connections to TDM data busses A, B C and D. Values from 4 thought 7 specify connections to the TDM valid lines corresponding to the A, B, C and D TDM data busses.

The functions affected are

dm4c51_tdm_src_add
dm4c51_tdm_src_add_lcl
dm4c51_tdm_dst_add
dm4c51_tdm_dst_add_lcl
dm4c51_tdm_src_del
and
dm4c51_tdm_dst_del

New FPGA Configuration for PM4700A MIPS Modules

The FPGA configuration for the PM4700A (file pm4700a9.mcs) improves the alignment of the processor TCLK with other system clocks. This corrects hold-time problems encountered with fast processor chips.